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BX80614E5630 - Intel Xeon E5630 4-Core 2.53GHz 5.86GT/s QPI-2 12MB L3 Cache Socket LGA1366 Processor
Availabilty: In stock
Refurbished
5032037010917
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Intel Xeon E5630 processor 2.53 GHz 12 MB Smart Cache Box
Intel® Xeon® Processor E5630
(12M Cache, 2.53 GHz, 5.86 GT/s Intel® QPI)
- Intel® Xeon® 5000 Sequence E5630 2.53 GHz
- 12 MB Smart Cache LGA 1366 (Socket B)
- Processor cores: 4 32 nm 64-bit 80 W
- Maximum internal memory supported by processor: 288 GB DDR3-SDRAM
- Box Cooler included
About Intel Xeon E5630, Intel® Xeon® 5000 Sequence, LGA 1366 (Socket B), 32 nm, Intel, E5630, 2.53 GHz
Intel Xeon E5630. Processor family: Intel® Xeon® 5000 Sequence, Processor socket: LGA 1366 (Socket B), Processor lithography: 32 nm. Memory channels: Triple-channel, Maximum internal memory supported by processor: 288 GB, Memory types supported by processor: DDR3-SDRAM. Market segment: Server, Supported instruction sets: SSE4.2, Physical Address Extension (PAE): 40 bit. Package width: 44 mm, Package depth: 140 mm, Package height: 117 mm. Processor package size: 42.5mm x 45mm
Intel® Turbo Boost TechnologyIntel® Turbo Boost Technology dynamically increases the processor's frequency as needed by taking advantage of thermal and power headroom to give you a burst of speed when you need it, and increased energy efficiency when you don’t.
Intel® Hyper-Threading Technology
Intel® Hyper-Threading Technology (Intel® HT Technology) delivers two processing threads per physical core. Highly threaded applications can get more work done in parallel, completing tasks sooner.
Enhanced Intel SpeedStep® Technology
Enhanced Intel SpeedStep® Technology is an advanced means of enabling high performance while meeting the power-conservation needs of mobile systems. Conventional Intel SpeedStep® Technology switches both voltage and frequency in tandem between high and low levels in response to processor load. Enhanced Intel SpeedStep® Technology builds upon that architecture using design strategies such as Separation between Voltage and Frequency Changes, and Clock Partitioning and Recovery.
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