FH8065801884007 - Intel Core i3-5015U Dual-Core 2.10GHz 5GT/s DMI 3MB L3 Cache Socket BGA1168 Processor

About Intel Core i3-5015U, Intel® Core™ i3, BGA 1168, 14 nm, Intel, i3-5015U, 2.1 GHz

Intel Core i3-5015U. Processor family: Intel® Core™ i3, Processor socket: BGA 1168, Processor lithography: 14 nm. Memory channels: Dual-channel, Maximum internal memory supported by processor: 16 GB, Memory types supported by processor: DDR3L-SDRAM, LPDDR-SDRAM. On-board graphics card model: Intel® HD Graphics 5500, Maximum on-board graphics card memory: 16 GB, On-board graphics card outputs supported: DisplayPort, Embedded DisplayPort (eDP), HDMI. Market segment: Mobile, PCI Express configurations: 4x1, 2x4, Supported instruction sets: SSE4.1, SSE4.2, AVX 2.0. Processor package size: 40mm x 24mm x 1.3mm

Advanced Encryption Standard New Instructions (AES-NI) are a set of instructions that enable fast and secure data encryption and decryption. AES-NI are valuable for a wide range of cryptographic applications, for example: applications that perform bulk encryption/decryption, authentication, random number generation, and authenticated encryption.

Intel® Identity Protection Technology is a built-in security token technology that helps provide a simple, tamper-resistant method for protecting access to your online customer and business data from threats and fraud. Intel® IPT provides a hardware-based proof of a unique user’s PC to websites, financial institutions, and network services; providing verification that it is not malware attempting to login. Intel® IPT can be a key component in two-factor authentication solutions to protect your information at websites and business log-ins.

Enhanced Intel SpeedStep® Technology is an advanced means of enabling high performance while meeting the power-conservation needs of mobile systems. Conventional Intel SpeedStep® Technology switches both voltage and frequency in tandem between high and low levels in response to processor load. Enhanced Intel SpeedStep® Technology builds upon that architecture using design strategies such as Separation between Voltage and Frequency Changes, and Clock Partitioning and Recovery.